Exemplary embodiments of the present invention relate to an internal voltage control circuit which may reduce an operating current by distributing an operating time.
Semiconductor devices are used in various fields. For example, semiconductor devices are used to store a variety of data. Since such semiconductor devices are used in various portable devices, including laptop computers and notebook computers, they are required to be high-capacity, high-speed, compact, and low-power.
Semiconductor devices use an external power supply voltage to generate internal voltages having various levels. Specifically, a semiconductor memory device (DRAM) generates a core voltage (VCORE) which is to be used in a bank region (CORE) and a peripheral region (PERI), a high voltage (VPP) which is higher than an external voltage (VDD) and is to be applied to a gate of a cell transistor (word line), and a back bias voltage (VBB) which is lower than a ground voltage (VSS) and is to be used in a bulk portion of a cell transistor.
In order to generate these internal voltages, a charge pumping scheme for VBB and VPP and a down converting scheme for VCORE are used. Without regard to the schemes, an internal reference voltage (VREF) is primarily generated, and new internal voltages (VBB, VPP, VCORE) are secondarily generated from the internal reference voltage (VREF).
Ideally, such an internal reference voltage should have a constant level with regard to process, voltage and temperature (PVT) variations at a low operating voltage.
FIG. 1 is a configuration block diagram of a conventional internal voltage control circuit.
Referring to FIG. 1, core voltage (VCORE) active drivers 10 and 11 for generating a core voltage are provided in a bank core region 40, the bank core region 40 being a first bank region. Also, (VCORE) active drivers 16 and 21 for generating a core voltage are provided in a bank core region 60, the bank core region 60 being a second bank region.
In a peripheral region 50 in which bank control circuits are provided, a plurality of core voltage (VCORE) active drivers 12 to 15 and 17 to 20 are provided around a core voltage (VCORE) control unit 30. The core voltage control unit 30 controls the driving of the core voltage active drivers provided in the bank regions 40 and 60 and the peripheral region 50, on the basis of bank active flag signals BANK_ACT_FLAG<0:X>.
The conventional internal voltage control circuit having the above-described configuration operates as follows.
The semiconductor device includes a plurality of banks, stores data in the banks, and reads out data stored in the banks. The core voltage active drivers are used for supplying voltages to the plurality of banks and for supplying voltages to be used in control circuits of the banks.
Accordingly, the core voltage control unit 30 determines a bank to be operated by decoding the bank active flag signals BANK_ACT_FLAG<0:X>. The core voltage control unit 30 enables the core voltage active driver to supply a voltage to the selected bank, and the core voltage active driver supplies a voltage to the control circuit of the selected bank.
There is no problem when the single bank and its control circuit are activated. However, in a case in which all banks are activated, as in an auto-refresh operation mode, that is, when all of the bank active flag signals BANK_ACT_FLAG<0:X> are enabled, the core voltage control unit 30 simultaneously drives all of the core voltage active drivers 10 to 21 provided in the first and second bank regions 40 and 60 and the peripheral region 50.
In this case, a large amount of IDD current is required when all of the core voltage active drivers 10 to 21 are simultaneously driven. Specifically, in the auto-refresh operation mode, excessive IDD current and VCORE peak current are caused when all of the core voltage active drivers simultaneously operate, resulting in a VDD voltage level drop. If the VDD voltage level drop is caused by the generation of the core voltage, a current to be supplied to other circuits (e.g.—the VPP pump circuit) becomes insufficient. Thus, other circuits may fail to operate.